1. Field
Various exemplary embodiments of the present invention relate to a bias sampling device and a complementary metal-oxide semiconductor (CMOS) image sensor including the same and, more particularly, to a bias sampling device and a CMOS image sensor including the same for sampling and providing a bias voltage.
2. Description of the Related Art
FIG. 1A is a block diagram illustrating a conventional CMOS image sensor having a local bias sampling structure. FIG. 1B is a block diagram illustrating a conventional CMOS image sensor having a global bias sampling structure. FIGS. 2A to 2C are diagrams illustrating image deterioration caused by global bias sampling.
Referring to FIG. 1A, the conventional CMOS image sensor having the local bias sampling structure may include a row decoder and pixel driver 111, a pixel array 112, a bias voltage generation unit 113, a pixel amplifying unit 114 and a read-out processing unit 115.
The row decoder and pixel driver 111 drives pixels, which are selected by a row decoder, included in the pixel array 112.
The pixel array 112 senses light using an optical element and generates a pixel signal corresponding to sensed light. The pixels, which are selected by a row decoder and driven by the pixel driver, of the pixel array output a pixel signal. The pixel signal is an electrical analog signal and includes a reset voltage and a signal voltage.
The bias voltage generation unit 113 generates and provides a bias voltage to a load transistor 116 of the pixel amplifying unit 114 through transmission line VBIAS1.
The pixel amplifying unit 114 amplifies the pixel signal of the pixel array 112 and transfers an amplified pixel signal to the read-out processing unit 115.
The read-out processing unit 115 reads-out the amplified pixel signal of the pixel amplifying unit 114 and outputs read-out data.
Since the bias voltage applied to the load transistor 116 of the pixel amplifying unit 114 is directly provided from the bias voltage generation unit 113, circuit noise generated from the bias voltage generation unit 113 or external noise may be applied to the load transistor 116, and quality deterioration may occur.
In order to prevent quality deterioration caused by circuit or external noise, a local bias sampling structure, using one sampling switch 117 and one sampling capacitor 118 included in the pixel amplifying unit 114 of each column, is widely used.
However, as shown in FIG. 1A, with the local bias sampling structure, since a plurality of sampling capacitors having a large capacity and thus occupying a large space are needed to prevent linearity deterioration, which is caused by the coupling of an output node of the pixel array 112, the CMOS image sensor having the local bias sampling capacitor structure has an increased size.
Referring to FIG. 1B, the conventional CMOS image sensor having the global bias sampling structure may include a row decoder and pixel driver 121, a pixel array 122, a bias voltage generation unit 123, a pixel amplifying unit 124, a read-out processing unit 125, a single sampling switch 127 and a single sampling capacitor 128. The row decoder and pixel driver 121, the pixel array 122, the bias voltage generation unit 123, and the read-out processing unit 125 shown in FIG. 1B are the same as the row decoder and pixel driver 111, the pixel array 112, the bias voltage generation unit 113, and the read-out processing unit 115 described with reference to FIG. 1A. To prevent quality deterioration caused by circuit noise or external noise, the global bias sampling structure using the single sampling switch 127 and the single sampling capacitor 128 at an entire column is also widely used.
However, as shown in FIG. 1B, in the global bias sampling structure, the CMOS image sensor may be implemented in a relatively small size. But, as shown in FIGS. 2A and 2C, a pixel output corresponding to a region B is saturated and sharply changes with a large amplitude. This change causes a change of voltage level in a transmission line VBIAS2 through a coupling capacitor to the transmission line VBIAS2. Herein, since the transmission line VBIAS2 is sampled through a global bias sampling structure, a gate voltage VGS of a load transistor of a region A is accordingly changed and thus a data error occurs to decrease the pixel data value of the region A due to the change of the gate voltage VGS. Therefore, as shown in FIG. 2B, an output image of the region A is darker than the corresponding real subject.